串口rx + RAM + LCD

REVIEW

昨天摸鱼怪发现高两位的数据写入or读出存在问题：

RAM + 串口的简单应用-CSDN博客

1. 今日摸鱼任务

UART_RX + RAM + LCD 来显示一下是 rx or tx 的问题

2. 代码部分

rx_ram_lcd.v

module rx_ram_lcd(
                     input clk ,
                     input reset_n ,
                     input uart_rx ,
                     output VGA_CLK,
                     output VGA_HS, //TFT行同步信号
                     output VGA_VS, //TFT场同步信号
                     output VGA_BLK,        //VGA 场消隐信号
                     output [23:0] VGA_RGB ,//TFT数据输出
                     output TFT_BL  //背光
                    );
    assign TFT_BL = 1; 
    wire Clk33M;  
    assign VGA_CLK= Clk33M;  
    wire rx_done;
    wire [7:0]rx_data;
    reg [7:0]addra;
    reg [7:0]addrb;
    wire [7:0]doutb;
    wire key_flag;
    wire key_state;
//    wire tx_done;
    wire [11:0]hcount;
    wire [11:0]vcount;
    wire Data_Req;   
        //定义颜色编码
    localparam 
        BLACK  = 16'h0000, //黑色
        WHITE  = 16'hFFFF; //白色
        
    localparam 
        DOT = BLACK,  //点是黑色
        BACKGROUND = WHITE;  //背景白色

    wire R_all = vcount >= 0 && vcount < 480;  
    wire C_all = hcount >= 0 && hcount < 800; 
    wire BR = R_all & C_all;//底色全为白色
    
      clk_33 vga_clk(
        .clk_out1(Clk33M),
        .clk_in1(clk)
       ); 
     
     ram ram_ (
                 .clka(clk), // input wire clka
                 .wea(rx_done), // input wire [0 : 0] wea
                 .addra(addra), // input wire [7 : 0] addra
                 .dina(rx_data), // input wire [7 : 0] dina
                 .clkb(Clk33M), // input wire clkb
                 .addrb(hcount<256?hcount:25), // input wire [7 : 0] addrb
                 .doutb(doutb) // output wire [7 : 0] doutb
                                    );
    
    uartrx uart_rx_(
                 . clk(clk) ,
                 . reset_n(reset_n) ,
                 . uart_rx(uart_rx) ,
                 . rx_data(rx_data),
                 . rx_done(rx_done)    );
    
    
    always@(posedge clk or negedge reset_n)
    if(!reset_n)
        addra <= 8'b0000_0000;
    else  if(rx_done)
         addra <= addra + 1'b1;
        

 
    
    reg [15:0]disp_data;          
   VGA_CTRL VGA_CTRL_(
        .clk(Clk33M),    //系统输入时钟25MHZ
        .reset_n(reset_n),
        .data(disp_data),    //待显示数据
        .data_req(Data_Req),
        .H_addr(hcount),    //VGA行扫描计数器
        .V_addr(vcount),   //VGA场扫描计数器
        .VGA_HS(VGA_HS),   //VGA行同步信号
        .VGA_VS(VGA_VS),   //VGA场同步信号
        .VGA_BLK(VGA_BLK), //VGA 场消隐信号
        .VGA_RGB(VGA_RGB)  //VGA数据输出
    );           
     wire dotline = (vcount == doutb) && hcount;     
     always@(*)
        case({BR,dotline})
           2'b10: disp_data = BACKGROUND;
           2'b11: disp_data = DOT;
         endcase
     
     
           
endmodule

.xdc

set_property IOSTANDARD LVCMOS33 [get_ports clk]
set_property IOSTANDARD LVCMOS33 [get_ports reset_n]
set_property IOSTANDARD LVCMOS33 [get_ports uart_rx]
set_property PACKAGE_PIN U18 [get_ports clk]
set_property PACKAGE_PIN H20 [get_ports reset_n]
set_property PACKAGE_PIN K16 [get_ports uart_rx]

set_property SEVERITY {Warning} [get_drc_checks NSTD-1]
set_property SEVERITY {Warning} [get_drc_checks RTSTAT-1]
set_property SEVERITY {Warning} [get_drc_checks UCIO-1]
 
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[23]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[22]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[21]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[20]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[19]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[18]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[17]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[16]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[15]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[14]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[13]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[12]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[11]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[10]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[9]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[8]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports VGA_BLK]
set_property IOSTANDARD LVCMOS33 [get_ports TFT_BL]
set_property IOSTANDARD LVCMOS33 [get_ports VGA_CLK]
set_property IOSTANDARD LVCMOS33 [get_ports VGA_HS]
set_property IOSTANDARD LVCMOS33 [get_ports VGA_VS]
set_property PACKAGE_PIN W20 [get_ports {VGA_RGB[23]}]
set_property PACKAGE_PIN W19 [get_ports {VGA_RGB[22]}]
set_property PACKAGE_PIN V17 [get_ports {VGA_RGB[21]}]
set_property PACKAGE_PIN V16 [get_ports {VGA_RGB[20]}]
set_property PACKAGE_PIN T15 [get_ports {VGA_RGB[19]}]
set_property PACKAGE_PIN V20 [get_ports {VGA_RGB[15]}]
set_property PACKAGE_PIN U17 [get_ports {VGA_RGB[14]}]
set_property PACKAGE_PIN V18 [get_ports {VGA_RGB[13]}]
set_property PACKAGE_PIN T16 [get_ports {VGA_RGB[12]}]
set_property PACKAGE_PIN R16 [get_ports {VGA_RGB[11]}]
set_property PACKAGE_PIN U19 [get_ports {VGA_RGB[10]}]
set_property PACKAGE_PIN Y19 [get_ports {VGA_RGB[7]}]
set_property PACKAGE_PIN Y18 [get_ports {VGA_RGB[5]}]
set_property PACKAGE_PIN W16 [get_ports {VGA_RGB[4]}]
set_property PACKAGE_PIN Y17 [get_ports {VGA_RGB[3]}]
set_property PACKAGE_PIN W14 [get_ports VGA_VS]
set_property PACKAGE_PIN U14 [get_ports VGA_HS]
set_property PACKAGE_PIN U15 [get_ports VGA_CLK]
set_property PACKAGE_PIN R17 [get_ports TFT_BL ]
set_property PACKAGE_PIN W15 [get_ports VGA_BLK]