xrun
xceliun

makefile文本

all:	clean 	comp 	ela	sim
comp:
	xrun -64bit -compile test.v +access+rwc
ela:
	xrun -64bit -elaborate test.v +access+rwc
sim:
	xrun -64bit -R -gui
clean:
	xrun -clean 

仿真代码

`timescale 1ns/1ns
module test ();
reg clk;
initial begin
    clk = 1'b0;
    forever begin
        #100 ;
        clk = ~clk;
    end
end
initial begin
    #1000;
    $finish;
end
initial begin
    forever begin
        #50;
        $display("%d",$time);
    end
end
endmodule

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