一 预期代码

 二 spinal代码

package ori

import spinal.core._


class pc_reg(width: Int) extends Component{
  val io = new Bundle {
    val pc = out UInt(width bits)
    val ce = out UInt (1 bits)
    val clk = in Bool()
    val rst = in Bool()
  }

  val ceClkDomain = ClockDomain(
    clock = io.clk,
    reset = io.rst,
    config = ClockDomainConfig(
      clockEdge        = RISING,
      resetKind        = SYNC,
      resetActiveLevel = HIGH
    ))
//  val ceClkDomain = ClockDomain(io.clk,io.rst)
//val ceClkDomain = ClockDomain.internal("ce")
//  ceClkDomain.clock := io.clk
//  ceClkDomain.reset := (io.ce === 1)

  val ceArea = new ClockingArea(ceClkDomain) {
    val ceReg = Reg(UInt(1 bits)) init(0)
    ceReg :&