仿真时Verdi出现的问题:
User Defined system task or function ($fsdbDumpfile) registered during elaboration and used within the simulation has not been registered during simulation.
解决方法:在run脚本中加上以下设置
又遇到如下问题:
可能是信号在rtl compile时被优化了,加上+access+rw \ 如上第一幅图。
modelsim中加-voptargs=+acc, VCS中加 -debug_access+all \