zync spi flash 频率配置

spi flash的频率配置代码流程及最终的频率值。

驱动目录

基于4.14.55 内核，

\drivers\spi\spi-dw-fmsh.c (控制器)
\drivers\spi\spi-dw.c
\drivers\mtd\devices\m25p80.c （设备）

\drivers\spi\spi.c

spi dts配置说明

	spi0: spi@e0001000 {
			compatible = "fmsh,dw-apb-ssi","snps,dw-apb-ssi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0xe0001000 0x1000>;
			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
			num-cs = <3>;
			clocks = <&clkc NCLK_SPI0>, <&clkc NCLK_APB_SPI0>;
			clock-names = "clk_ref", "pclk";
			reg-io-width = <4>;
			spi-max-frequency = <1000000>;
			cs-gpios = <&portb 10 0>;
			status = "disabled";

			
			flash1@0 {
				compatible = "spi-flash","spansion,s25fl256s1", "jedec,spi-nor";
				reg = <0>;
				spi-max-frequency = <500000>;
			};

			spidev@1 {				
		    compatible = "spidev";
            spi-max-frequency = <20000000>;
             reg = <1>;
                };
		};

属性	说明
cs-gpios	片选的配置。对于zync，其可能采用MIO或者EMIO,在设计时，vivado里面就配置好管脚

初始化流程

很多设备的套路都是先初始化控制器，然后再扫描控制器下的设备，对设备进行初始化。

初始化包括对硬件的初始化，以及根据硬件及DTS等配置初始化相关结构体，最终构成软件操作依赖。

控制器的初始化比较简单，只要明了驱动，进入probe就可以。

控制器

probe探测


static int dw_spi_fmsh_probe(struct platform_device *pdev)
{
	struct dw_spi_mmio *dwsmmio;
	struct dw_spi *dws;
	struct resource *mem;
	int ret;


	dws->bus_num = pdev->id;
    //读取控制的输入频率，例如166M HZ
	dws->max_freq = clk_get_rate(dwsmmio->clk);

	


	ret = dw_spi_add_host(&pdev->dev, dws);
	if (ret)
		goto fail;
    printk("xiehj end: dw_spi_fmsh_probe\n");
	platform_set_drvdata(pdev, dwsmmio);
	return 0;

fail:
	clk_disable_unprepare(dwsmmio->pclk);
fail_pclk:
	clk_disable_unprepare(dwsmmio->clk);

	return ret;
}

初始化

如下将其配置为master，SPI 通信分为master 、slave。


int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
{
	struct spi_master *master;
	int ret;

	

	ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev),
			  master);
	if (ret < 0) {
		dev_err(dev, "can not get IRQ\n");
		goto err_free_master;
	}
    // 注册操作接口，这些操作接口在设备初始化时可能会回调，

	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP;
	master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
	master->bus_num = dws->bus_num;
	master->num_chipselect = dws->num_cs;
	master->setup = dw_spi_setup;
	master->cleanup = dw_spi_cleanup;
	master->set_cs = dw_spi_set_cs;
	master->transfer_one = dw_spi_transfer_one;
	master->handle_err = dw_spi_handle_err;
	master->max_speed_hz = dws->max_freq; //master是控制器设备，设置为166M
	master->dev.of_node = dev->of_node;
	master->flags = SPI_MASTER_GPIO_SS;

	
}

将控制器添加到设备后，后续芯片初始化时，命令的发送如何知道走整个控制器的相关接口的呢？此为通用的注册流程，即在下面的接口后，会进一步扫描DTS中的设备子节点，进而建立关联，此处非本文重点，感兴趣的自行阅读代码。套路都一样的。

ret = devm_spi_register_master(dev, master);

控制器的注册


int spi_register_controller(struct spi_controller *ctlr)
{
	struct device		*dev = ctlr->dev.parent;
	struct boardinfo	*bi;
	int			status = -ENODEV;
	int			id, first_dynamic;

	
    .......................省去一堆
	
	/* add statistics */
	spin_lock_init(&ctlr->statistics.lock);

	mutex_lock(&board_lock);
	list_add_tail(&ctlr->list, &spi_controller_list);
	list_for_each_entry(bi, &board_list, list)
		spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
	mutex_unlock(&board_lock);

	/* Register devices from the device tree and ACPI */
    这里注册SPI下挂的设备
	of_register_spi_devices(ctlr);
	acpi_register_spi_devices(ctlr);
done:
	return status;
}

解析设备树

获取设备树里面配置

static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
			   struct device_node *nc)
{
	u32 value;
	int rc;

	/* Mode (clock phase/polarity/etc.) */
	

	/* Device speed */
	rc = of_property_read_u32(nc, "spi-max-frequency", &value);
	if (rc) {
		dev_err(&ctlr->dev,
			"%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc);
		return rc;
	}
    //注意这里从DTS读出的值，翻到了spi_device中，也就是FLASH等端点设备中，也就是端点设备需要的速率。
	spi->max_speed_hz = value;

	return 0;
}

设备添加

所谓的设备添加，即将控制器下面的设备添加到系统中，以便匹配后续的驱动。

在此流程中，如果设备最大频率没有配置，则采用控制器的最大频率


int spi_setup(struct spi_device *spi)
{
	//如下判断是否需要采用控制器的最大频率
	if (!spi->max_speed_hz)
		spi->max_speed_hz = spi->controller->max_speed_hz;

	if (spi->controller->setup)
		status = spi->controller->setup(spi);

	spi_set_cs(spi, false);

	dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
			(int) (spi->mode & (SPI_CPOL | SPI_CPHA)),
			(spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
			(spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
			(spi->mode & SPI_3WIRE) ? "3wire, " : "",
			(spi->mode & SPI_LOOP) ? "loopback, " : "",
			spi->bits_per_word, spi->max_speed_hz,
			status);

	return status;
}

设备初始化

设备添加到系统后，就调用驱动


/*
 * board specific setup should have ensured the SPI clock used here
 * matches what the READ command supports, at least until this driver
 * understands FAST_READ (for clocks over 25 MHz).
 */
static int m25p_probe(struct spi_device *spi)
{
	struct flash_platform_data	*data;
	struct m25p *flash;
	struct spi_nor *nor;


	nor = &flash->spi_nor;

	/* install the hooks */
	nor->read = m25p80_read;
	nor->write = m25p80_write;
	nor->write_reg = m25p80_write_reg;
	nor->read_reg = m25p80_read_reg;

	nor->dev = &spi->dev;
	spi_nor_set_flash_node(nor, spi->dev.of_node);
	nor->priv = flash;

	spi_set_drvdata(spi, flash);
	flash->spi = spi;

	if (spi->mode & SPI_RX_QUAD) {
		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;

		if (spi->mode & SPI_TX_QUAD)
			hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
					SNOR_HWCAPS_PP_1_1_4 |
					SNOR_HWCAPS_PP_1_4_4);
	} else if (spi->mode & SPI_RX_DUAL) {
		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;

		if (spi->mode & SPI_TX_DUAL)
			hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
	}

	if (data && data->name)
		nor->mtd.name = data->name;

	/* For some (historical?) reason many platforms provide two different
	 * names in flash_platform_data: "name" and "type". Quite often name is
	 * set to "m25p80" and then "type" provides a real chip name.
	 * If that's the case, respect "type" and ignore a "name".
	 */
	if (data && data->type)
		flash_name = data->type;
	else if (!strcmp(spi->modalias, "spi-nor"))
		flash_name = NULL; /* auto-detect */
	else
		flash_name = spi->modalias;

	ret = spi_nor_scan(nor, flash_name, &hwcaps);
	if (ret)
		return ret;

	return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
				   data ? data->nr_parts : 0);
}

提供：

1） flash 的读写接口，及寄存器读写接口。在通用的nor驱动里面回调这些接口。通用nor驱动主要对nor 命令进行封装。

2）扫描设备。在设备驱动中扫描设备逻辑存在问题。在控制器中扫描更合适。

3）将设备注册为MTD设备。

这里只要兼容，jedec，spi-nor 都会进到这个驱动中。

static const struct of_device_id m25p_of_table[] = {
	/*
	 * Generic compatibility for SPI NOR that can be identified by the
	 * JEDEC READ ID opcode (0x9F). Use this, if possible.
	 */
	{ .compatible = "jedec,spi-nor" },
	{}
};

读写flash的流程

具体控制器的transfer接口

SPI的频率设置在每次transfer时都会进行，因而需要关注此流程。从下面代码我们了解到

进行分频系数的设置，但是涉及到transfer->speed-hz

static inline void spi_set_clk(struct dw_spi *dws, u16 div)
{
	dw_writel(dws, DW_SPI_BAUDR, div);
}


static int dw_spi_transfer_one(struct spi_master *master,
		struct spi_device *spi, struct spi_transfer *transfer)
{
	struct dw_spi *dws = spi_master_get_devdata(master);
	struct chip_data *chip = spi_get_ctldata(spi);
	u8 imask = 0;
	u16 txlevel = 0;
	u32 cr0;
	int ret;

	//在发送的时候，设置波特率的分频，每次都单打设置。


	/* Handle per transfer options for bpw and speed */
	if (transfer->speed_hz != dws->current_freq) {
		if (transfer->speed_hz != chip->speed_hz) {
			/* clk_div doesn't support odd number */
			chip->clk_div = (DIV_ROUND_UP(dws->max_freq, transfer->speed_hz) + 1) & 0xfffe;
			chip->speed_hz = transfer->speed_hz;
		}
		dws->current_freq = transfer->speed_hz;
		spi_set_clk(dws, chip->clk_div);
	}
	
	
	if (chip->poll_mode)
		return poll_transfer(dws);

	return 1;
}

transfer speed hz

\drivers\spi\spi.c

__spi_sync ---》 status = __spi_validate(spi, message);


static int __spi_validate(struct spi_device *spi, struct spi_message *message)
{
	struct spi_controller *ctlr = spi->controller;
	struct spi_transfer *xfer;
	int w_size;

	

		if (!xfer->speed_hz)
			xfer->speed_hz = spi->max_speed_hz; //首先将xfer的频率设置为设备请求的最大频率
		if (!xfer->speed_hz)
			xfer->speed_hz = ctlr->max_speed_hz; //如果没有则设置控制器的最大频率

		if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
			xfer->speed_hz = ctlr->max_speed_hz;

		if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
			return -EINVAL;

		/*
		 * SPI transfer length should be multiple of SPI word size
		 * where SPI word size should be power-of-two multiple
		 */
		if (xfer->bits_per_word <= 8)
			w_size = 1;
		else if (xfer->bits_per_word <= 16)
			w_size = 2;
		else
			w_size = 4;

		/* No partial transfers accepted */
		if (xfer->len % w_size)
			return -EINVAL;

		if (xfer->speed_hz && ctlr->min_speed_hz &&
		    xfer->speed_hz < ctlr->min_speed_hz)
			return -EINVAL;

		if (xfer->tx_buf && !xfer->tx_nbits)
			xfer->tx_nbits = SPI_NBITS_SINGLE;
		if (xfer->rx_buf && !xfer->rx_nbits)
			xfer->rx_nbits = SPI_NBITS_SINGLE;
		/* check transfer tx/rx_nbits:
		 * 1. check the value matches one of single, dual and quad
		 * 2. check tx/rx_nbits match the mode in spi_device
		 */
		if (xfer->tx_buf) {
			if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
				xfer->tx_nbits != SPI_NBITS_DUAL &&
				xfer->tx_nbits != SPI_NBITS_QUAD)
				return -EINVAL;
			if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
				!(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
				return -EINVAL;
			if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
				!(spi->mode & SPI_TX_QUAD))
				return -EINVAL;
		}
		/* check transfer rx_nbits */
		if (xfer->rx_buf) {
			if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
				xfer->rx_nbits != SPI_NBITS_DUAL &&
				xfer->rx_nbits != SPI_NBITS_QUAD)
				return -EINVAL;
			if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
				!(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
				return -EINVAL;
			if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
				!(spi->mode & SPI_RX_QUAD))
				return -EINVAL;
		}
	}

	message->status = -EINPROGRESS;

	return 0;
}